High power radio frequency (RF) amplifiers demand stringent performances from their bias power supplies. Tighter output voltage regulations with better stability, lower output ripples, lower stored energies etc., are some of the output performance requirements and lower input harmonics, better Input Power Factors (IPF) etc., are crucial input performance requirements of these power supplies. Most of these requirements are contradictory in nature. For example, in high power regulated DC power supplies, the output ripple increases with the increase in control range of output voltages requiring bigger ripple filters, which in turn stores substantial energy. But RF amplifiers are sensitive to stored energies during internal flashover, arcing, etc., and can handle maximum up to 20 Joules of stored energy, the realization of which is a major challenge to the designer. Traditionally, crowbars are placed across filter capacitors of these DC power supplies to bypass stored energies under any unfavorable conditions. Bigger ripple filters also reduces control bandwidth deteriorating output voltage stability. Another challenge encountered with high power regulated DC power supplies is the generation of substantial line harmonics as well as significant deterioration of the input power factor. These aspects are being given increasing attention as the use of solid state semiconductor devices have increased significantly in recent past and will continue to increase further due to its ability for the better control of processes and its miniaturization. But they are inherently non-linear, generating harmonics current in the line as well as deteriorating the input power factor significantly. Several topologies have been adopted worldwide for high voltage DC bias power supplies of high power RF amplifiers.
Reference is made to M. K. Badapanda and P. R. Hannurkar, “Klystron bias power supplies for Indus-2 Synchrotron Radiation Source”, IETE Journal of Research, Vol. 54, no. 6, pp. 403-412, November, 2008. In the prior art, topology 10 as shown in FIG. 1 uses SCRs in AC regulator configuration 11 for regulating output voltage of an high voltage DC (HVDC) power supply at the desired level under possible input and output variations. The secondaries of the main transformer are splitted into two parts, one connected in STAR 12, while the other in DELTA 13 and each is feeding to its corresponding 3-phase diode bridge 14 and 15. Suitable output ripple filter is employed in L-C configuration 16 to minimize the output ripple. In addition, crowbar protections 17 are employed to bypass output filter stored energies under any unfavorable conditions. A 3-phase series limiting inductor 18 is also employed in the primary side to limit the short circuit current. This series limiting inductor in conjunction with suitable detuned line filter 19 minimizes the input harmonics current going back into the input supply system as well as improves the input power factor. However, the scheme stores substantial energy in their output ripple filter 16 even after cutting off the input supply, requiring suitable crowbar 17 to bypass these stored energies for protecting the sensitive RF amplifier, under any unfavorable conditions. Further, although the input system is 12 pulsed at very low firing angle, it becomes 6 pulsed at higher firing angles. As the firing angle of SCRs in the AC regulator increases, the ripple at the output increases needing more filtering. This output filter in conjunction with 6 pulsed AC regulator control reduces the control bandwidth significantly. Furthermore, AC regulator control also increases the line harmonics and deteriorates the input power factor significantly discouraging its use for high power applications
Reference is made to J. Bradley III, D. Rees, R. Przeklasa, R. Jaitly, G. Schofield, M. Scott, “Operational experience with two types of 2 MW HVDC power supplies on LEDA”, Proceedings of the Particle Accelerator Conference, pp. 1010-1012, New York, 1999 and A. J. Moss, R. J. Smith, S. A. Griffiths, “Upgrade of the SRS klystron power supply”, Proceedings of the 2001 Particle accelerator conference, Chicago, 2001. FIG. 2 shows the schematic of an exemplary prior art, topology 20, where 3-phase, medium voltage input 21 is first step down to a controllable voltage of 1.5 kV by a transformer 22 having two secondary windings, one in star and other in delta, resulting 30° shifted input line voltages. These voltages are controlled by 3-phase SCR bridges 23 and 24 and fed to two numbers of step up transformers having open primary windings 25 and 26. The secondary output of these transformers are rectified and connected in series as shown in FIG. 2. The input system becomes 12 pulsed generating lesser input harmonics and better input power factor in comparison to that of FIG. 1. The filter inductors 27 and 28 in input 3-phase SCR bridges help in reducing output filter capacitance 29 requirement appreciably to meet the output ripple criteria. However, this scheme stores substantial energy in the primary bridge inductors 27 and 28, which needs to be dissipated under unfavorable conditions. Further, although the input system is 12 pulsed, but the scheme still requires crowbar for protecting RF amplifiers as well as input line filters to limit line harmonics.
Reference is further made to I. S. Roth, J. A. Casey, M. P. J. Gaudreau, M. A. Kempkes, T. J. Hawkey, J. M. Mulvaney, “A solid state opening switch and mod anode supply for the advanced light source klystrons”, IEEE Twenty Fifth International Conference on Power Modulator Symposium, pp. 453-456, California, June 2002 and A. J. Moss, R. J. Smith, S. A. Griffiths, “Upgrade of the SRS klystron power supply”, Proceedings of the 2001 Particle accelerator conference, Chicago, 2001. FIG. 3 shows the schematic of another exemplary prior art, topology 30, where the high voltage DC 31 is first regulated by a solid state IGBT series switch 32 in bulk regulator configuration and suitably filtered 33 and 34. The second switch 35 is used as fast acting series opening switch operated in ON/OFF mode as a replacement of crowbar, which will isolate the load from stored energies in the filter under any unfavorable conditions. However, the said scheme is dependent on the availability and reliability of high voltage series connected solid state switches 32 and 35 and their associated driver circuits. Moreover, the high voltage series switch 32 can be operated only in few kHz range needing appreciable output filtering 33 and 34, restricting the control bandwidth of the power supply. Since significant energies are stored in this filter, they require another high voltage series opening switch 35 to isolate the load from these stored energies under its unfavorable arcing conditions.
Reference is further made to J. Bradley III, D. Rees, R. Przeklasa, R. Jaitly, G. Schofield, M. Scott, “Operational experience with two types of 2 MW HVDC power supplies on LEDA”, Proceedings of the Particle Accelerator Conference, PP. 1010-1012, New York, 1999; W. Forster, J. Alex, “High-voltage, high-power, pulse-step modulators for the accurate supply of gyrotron and other heating devices”, IEEE Twenty Fifth International Conference on Power Modulator Symposium, pp. 126-129, California, June, 2002 and A. J. Moss, R. J. Smith, S. A. Griffiths, “Upgrade of the SRS klystron power supply”, Proceedings of the 2001 Particle accelerator conference, Chicago, 2001. FIG. 4 shows the schematic of a prior art, solid state topology 40, where two numbers of multi secondary transformers 41 and 42, primary winding of one is connected in Star 43 and the other in Delta 44. All the secondary windings are connected in Star 45 and 46, suitably rectified 47, filtered 48 with an IGBT 49 in each operated in chopper mode and are connected in series. The input system is 12 pulsed, generating lesser input harmonics and better input power factor in comparison to 6 pulsed system requiring only lower rated input line filter. In this scheme, the series connection of module outputs minimizes the output filter capacitances significantly requiring only a lower rated crowbar for the protection of sensitive high power RF amplifiers under any unfavorable conditions. However, the said scheme employs multi secondary transformers 41 and 42, which are difficult to fabricate. Further, the mutual coupling among the various windings 43 to 45 and 46 alters the voltage ratios different from their actual turns ratio, resulting in different DC voltages from different power modules, which comes on the way of achieving 12 pulse input system. The control of this power supply is on high voltage side, which demands complex sensing as well as costly fibre optics based communication system. In addition, parasitic capacitances in the secondary windings of multi secondary transformers 45 and 46 are charged up to the highest voltage in the system, which hardly find any paths for their discharges in spite of tripping module switchgears and IGBTs 49 under any unfavorable situations leaving high voltage safety related issues. Furthermore, if one of the power module fails, the input system corresponding to its associated module becomes 6 pulsed requiring input line filter to limit line harmonics.
Thus, the drawback of conventional topologies of the controlled DC power supplies is that the control of output voltage affects both input performance parameters like input line harmonics, input power factors as well as output performance parameters like output ripple, output stored energy. Also, most of the schemes adopted for similar applications are either 6 pulsed or 12 pulsed and the line harmonics generated by them increases with increase in the control range deteriorating the input power factor significantly.
It is further noted that a p-pulse converter (p>1) under balanced and matched conditions of operations generates characteristics harmonics on the AC side of the order h given byh=pn±1  (1)                Where, n is any positive integer.        
The magnitude of different harmonics current (Ih) is inversely proportional to their corresponding harmonics order (h) and is given byIh=Il/h  (2)                Where, Il is the magnitude of fundamental rms current.        
It has been extensively realized that even a 12 pulsed input system, under classical infinite DC link inductances, generates almost 9% of 11th harmonics, 8% of 13th harmonics and so on. These values also increase further under practical conditions, along with the generation of some amount of 5th and 7th harmonics causing problem in limiting the line harmonics below that specified in the IEEE Std 519-1992. Again, input power factor (IPF), which is the product of displacement power factor and distortion power factor also reduces. The maximum total IPF, obtainable from a p-pulsed converter, assuming no phase retard, no commutation overlap and neglecting the transformer magnetizing current is given by
Maximum total
                                          I            ⁢                                                  ⁢            P            ⁢                                                  ⁢            F                    =                                    p              Π                        ⁢                          sin              ⁡                              (                                  Π                  p                                )                                                    ,                              for            ⁢                                                  ⁢            p                    >          1                                    (        3        )            
Thus, the maximum IPF obtainable from a 6 pulsed, 12 pulsed and 24 pulsed uncontrolled rectifiers is 0.955, 0.988 and 0.997 respectively 51 and 52. Neglecting commutation overlap(μ) for uncontrolled rectifier, IPF reduces with transformer magnetizing current. The input power factor versus percentage reactance for 6 pulsed 53 and 12 pulsed 56 uncontrolled rectifiers with different magnetizing currents are presented in FIG. 5 for reference. It is noted that the input power factor versus percentage reactance curve for a 24 pulsed converter will lie above that of 12 pulsed converter. The current trend is to go behind higher pulsed converters for reduction of line harmonics as the harmonics generated by one of its converter are cancelled by those produced by the other converter inside it, thus help realizing the so called clean power conversion, which is of prime concern for the high power system.
It is thus required to develop a system with a crowbar less topology that provides a high voltage DC power supply with full range 24 pulsed input and ripple free output for RF amplifiers, where the control of its output voltage neither affects input line harmonics and input power factor nor affects the output ripple. Also, the input system has inherently low input harmonics and high input power factor making it suitable for high power applications.